1. Field of the Invention
The present invention relates to bandgap voltage reference circuits, in a particular, to bandgap voltage reference circuits capable of operating at low power supply voltages such as within a range of 1.5-5.5 volts.
2. Related Art
As is well known in the art, reliable voltage references are required for many types of circuits an systems. In particular, such voltage references are often required to be consistent over temperature. Perhaps the most common voltage reference circuitry relies upon the bandgap of silicon. Various forms of such circuits have been designed and implemented to generate a reference voltage of 1.2 volts that is substantially constant over temperature. However, if circuits are required to operate at lower voltages, such as 1.5 volts, a bandgap voltage of 1.2 volts leaves only 0.3 volt headroom. Such little voltage headroom is often inadequate to maintain proper circuit operation.
Referring to FIG. 1, when operating at such low power supply voltages, where headroom becomes a significant problem, most existing bandgap reference circuits use a parallel architecture where a proportional to absolute temperature (PTAT) current and a base-emitter voltage (VBE), or a portion of VBE, are generated separately and combined together to produce the 1.2 volt bandgap voltage, or a divided-down voltage based on such bandgap. For example, as shown, a differential amplifier A1, in conjunction with current mirror circuitry formed by PMOS devices M0, M1, M2, M3, bipolar junction transistors Q0, Q1 and a resistor R0 provide a PTAT current via the drain electrode of PMOS device M0. Another differential amplifier A2, in conjunction with current mirror circuitry formed by PMOS devices M4, M5, M6, M7, a bipolar junction transistor Q2 and resistor R2 provide a current based on the VBE of transistor Q2 via the drain electrode of PMOS device M4. These currents combine and generate the bandgap voltage VBG across an output resistor R1.
While such a circuit architecture allows for operation at a low power supply voltage VDD, errors in the bandgap voltage VBG over temperature are nonetheless generated from the input offsets of the two amplifiers A1, A2, and mismatches within the current mirror circuits. Further, such an architecture is relatively large in size and has two separate closed loop systems (about the differential amplifiers A1, A2) that require separate compensation. While it is possible to use bandgap trimming to improve the bandgap accuracy, the circuit size will become even larger as a result and test times increase due to the trimming needed. When using low voltage devices (e.g., maximum VDS of 1.8 volts), this circuit architecture also limits the maximum power supply voltage (VDD), since PMOS devices M0, M2, M3, M4, M6 and M7 are exposed to nearly the entire VDD voltage level. Adding voltage protection circuitry in series with these devices will then add circuit complexity and limit the operation at low VDD power supply levels.
Accordingly, it would be desirable to have an improved bandgap reference circuit Architecture capable of operating at significantly reduced power supply voltages, while minimizing the number of offsets and trimming requirements.